Ryota Shioya

Department of Creative Informatics, Graduate School of Information Science and Technology, the University of Tokyo

Computer Architecture

Processor Microarchitecture
Hardware Security
Processor/System/Circuit Simulator

System Software

Language Environment
Operating System

Here is a short handout about our research group.

2006. B.S from Course of Electronic Engineering, Engineering Department, The University of Tokyo
2008. M.E from Course of Information and Communication Engineering, Graduate School of Information Science and Technology, The University of Tokyo
2011. Ph.D. from Course of Information and Communication Engineering, Graduate School of Information Science and Technology, The University of Tokyo

2011. Assistant Professor, Nagoya University
2017. Associate Professor, Nagoya University
2018. Associate Professor, the University of Tokyo

IPSJ/IEEE-CS Young Computer Researcher Award (2020)
Design Solution Forum 2019 Best Presentation Award (2019)
IPSJ Yamashita Award (2019)
IPSJ SIGARC Young Researcher Award (2017)
IPSJ SIGARC Young Researcher Award (2015)
IPSJ Computer Science Research Award for Young Scientists (2014)
IPSJ SIG-ARC The 1st High-Performance Processor Design Contest 1st Place Winner (2014)
Symposium on Advanced Computing Systems and Infrastructures (SACSIS2013) Best Paper Award (2013)
Symposium on Advanced Computing Systems and Infrastructures (SACSIS2013) Young Researcher Award (2013)
IEEE Computer Society Japan Chapter Young Author Award (2011)
Dean's Award, Graduate School of Information Science and Technology, The University of Tokyo (2011)

Program Committee Member

IEEE International Symposium on High-Performance Computer Architecture (HPCA) Program Committee (2020,2023)
IEEE International Conference on Field-Programmable Technology (ICFPT) Program Committee（2023）
IEEE International Conference on Computer Design (ICCD) Program Committee (2015,2019)
IEEE/ACM International Symposium on Microarchitecture (MICRO) Program Committee (2018)
IEEE International Symposium on Embedded Multicore/Manycore SoCs (MCSoC) Program Committee (2018,2019)
Supercomputing Asia (SCAsia) Program Committee (2017,2018,2019)
International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia) Program Committee (2017,2023)
IPSJ Annual Meeting on Advanced Computing System and Infrastructure (ACSI) Program Committee (2014,2015)
International Symposium on Computing and Networking (CANDAR) Program Committee(2013-2022)

Organizing Committee Member

IEEE Non-Volatile Memory Systems and Applications Symposium (NVMSA), Workshop Chair (2018), Publication Chair（2023）
IEEE/ACM International Symposium on Microarchitecture (MICRO), Workshop/Tutorial Chair (2018)
IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Workshop Chair (2018)

Others

IEEE/ACM International Symposium on Computer Architecture (ISCA) External Reviewer (2021)

My publication list is here. The following are selected ones.
Toru Koizumi, Ryota Shioya, Shu Sugita, Taichi Amano, Yuya Degawa, Junichiro Kadomoto, Hidetsugu Irie, and Shuichi Sakai:
Clockhands: Rename-free Instruction Set Architecture for Out-of-order Processors,
IEEE/ACM International Symposium on Microarchitecture (MICRO), (to appear). [ PDF ]
(Best Paper Nominee)
Yuichi Sugiyama, Reoma Matsuo, and Ryota Shioya:
SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), (to appear). [ PDF ] [ Github ]
Tetsuro Yamazaki, Tomoki Nakamaru, Ryota Shioya, Tomoharu Ugawa, and Shigeru Chiba:
Collecting Cyclic Garbage across Foreign Function Interfaces,
ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), (to appear).
Susumu Mashimo, Akifumi Fujita, Reoma Matsuo, Seiya Akaki, Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Masahiro Goshima, Koji Inoue, and Ryota Shioya:
An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor,
IEEE International Conference on Field-Programmable Technology (ICFPT), pp. 63—71 (2019). [ PDF ]
(Best Paper Candidate)
Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, and Shuichi Sakai:
STRAIGHT: Hazardless Processor Architecture without Register Renaming,
IEEE/ACM International Symposium on Microarchitecture (MICRO 51), pp. 121—133 (2018). [ PDF ]
Ryota Shioya, Masahiro Goshima, and Hideki Ando:
A Front-end Execution Architecture for High Energy Efficiency,
IEEE/ACM International Symposium on Microarchitecture (MICRO 47), pp. 419—431 (2014). [ PDF ]
Ryota Shioya, Kazuo Horio, Masahiro Goshima, and Shuichi Sakai:
Register Cache System not for Latency Reduction Purpose,
IEEE/ACM International Symposium on Microarchitecture (MICRO 43), pp. 301—312 (2010). [ PDF ]
(IEEE Computer Society Japan Chapter Young Author Award)

E-mail: shioya [at] ci.i.u-tokyo.ac.jp