Publications 2024

(Last update: 12/31/2024)

International Conferences & Symposiums (with peer review)

  1. Soramichi Akiyama, Ryota Shioya, Yuto Miyatake, and Tongxin Yang:
    “Error Distribution Estimation for Fixed-point Arithmetic using Program Derivatives”,
    IEEE International Symposium on Quality Electronic Design (ISQED), pp. 1—9 (2024).
  2. Reoma Matsuo, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, and Ryota Shioya:
    “Branch Divergence-Aware Flexible Approximating Technique on GPUs”,
    IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips), pp. 1—6 (2024).
  3. Masayuki Kimura and Ryota Shioya:
    “ReOVE: Restricted Out-of-Order Execution for Superscalar Processors with Vector Extension”,
    ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), pp. 1—6 (2024).
    Open Access
  4. Eri Ogawa, Tetsuro Yamazaki, and Ryota Shioya:
    “Dynamic Possible Source Count Analysis for Data Leakage Prevention”,
    ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes (MPLR), pp. 98—111 (2024).
    Open Access
  5. Shinobu Miwa, Eiichiro Sekikawa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, and Hiroki Honda:
    “CACTI-CNFET: An Analytical Tool for Timing, Power, and Area of SRAMs with Carbon Nanotube Field Effect Transistors”,
    Asia and South Pacific Design Automation Conference (ASP-DAC), (to appear).
  6. Eri Ogawa, Tetsuro Yamazaki, and Ryota Shioya:
    “Dynamic Controllability Analysis for Preventing Injection Attacks”,
    IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), (to appear).
  7. Changbin Chen, Shu Sugita, Yotaro Nada, Hidetsugu Irie, Shuichi Sakai, and Ryota Shioya:
    “Biotite: A High-Performance Static Binary Translator using Source-Level Information”,
    ACM International Conference on Compiler Construction (CC), (to appear).

Journal/Transaction/Letter

  1. Reoma Matsuo, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, and Ryota Shioya,
    “Flexible Approximate Computing for Mitigating Branch Divergence in GPUs”,
    IEEE MICRO, (to appear).
  2. Reoma Matsuo, Toru Koizumi, Hidetsugu Irie, Shuichi Sakai, and Ryota Shioya,
    “Enhancing GPU Performance through Complexity-Effective Out-of-Order Execution using Distance-based ISA”,
    IEICE Transactions on Information and Systems (to appear).
  3. Chenlin Shi, Shinobu Miwa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, and Hiroki Honda:
    “CNFET-OCL: Open-source Cell Libraries for Advanced CNFET Technologies”,
    IEEE Access (to appear).
  4. Yotaro Nada, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, and Shuichi Sakai:
    “Inspex: Speculative Execution of Ready-to-Execute Loads in In-Order Cores”,
    IEEE Computer Architecture Letters (CAL) (to appear).

Poster

  1. Chenlin Shi, Shinobu Miwa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, and Hiroki Honda:
    “Analysis of 64-bit Parallel Prefix Adders and 32-bit Matrix Multiply Units Designed with 7-nm CNFET”,
    ACM/IEEE Design Automation Conference (DAC), (to appear).